Abstract
As personal
computers have become more prevalent and more applications have
been designed for them, the end-user has seen the need for a faster,
more capable system to keep up. Speedup has been achieved by increasing
clock speeds and, more recently, adding multiple processing cores
to the same chip. Although chip speed has increased exponentially
over the years, that time is ending and manufacturers have shifted
toward multicore processing. However, by increasing the number
of cores on a single chip challenges arise with memory and cache coherence as well
as communication between the cores. Coherence protocols and
interconnection networks have resolved some issues, but until
programmers learn to write parallel applications, the full benefit
and efficiency of multicore processors will not be attained.
Background
The trend of increasing a processor's speed to get a boost in performance is a way of the past. Multicore processors are the new direction manufacturers are focusing on. Using multiple cores on a single chip is advantageous in raw processing power, but nothing comes for free.
With additional cores, power consumption and heat dissipation become a concern and must be simulated before layout to determine the best floorplan which distributes heat across the chip, while being careful not to form any hot spots. Distributed and shared caches on the chip must adhere to coherence protocols to make sure that when a core reads from memory it is reading the current piece of data and not a value that has been updated by a different core.
With multicore processors come issues that were previously unforeseen. How will multiple cores communicate? Should all cores be homogenous, or are highly specialized cores more efficient? And most importantly, will programmers be able to write multithreaded code that can run across multiple cores?
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